(Completed: 56)
Supervision of Dissertation for Bachelor of Engineering at Universiti Kebangsaan Malaysia (UKM):
| 1. | 2022/23 | Supervisor | Tsara` Irdina Binti Himily Hairul
(A174823) |
Performance analysis of different feature ranking algorithms for identifying the most significant features for chronic kidney disease prediction |
| 2. | 2021/22 | Supervisor | Deepanraj a/l K.Vasanthan
(A169058) |
A Nomogram-based diabetic sensorimotor polyneuropathy severity prediction using Michigan neuropathy screening instrumentations |
| 3. | 2021/22 | Supervisor | Kwek Yeek Ping
(A169694) |
Hardware design of an approximate multiplier based on minimal signed digit representation for faster Convolutional Neural Networks |
| 4. | 2020/21 | Supervisor | Muhammad Taufiq Asri Bin Mohammad Nazari
(A164330) |
Design of A Low-Dropout Linear Regulator in 0.13 μm CMOS Technology |
| 5. | 2020/21 | Supervisor | Muhammad Akmal Bin Abdul Ghani
(GA04296) |
Low Power Low Phase Noise CMOS Voltage Controlled Ring Oscillator |
| 6. | 2019/20 | Supervisor | Ooi Jun Wei (A160725) |
Design of Low Power Phase Detector in 0.13 um CMOS Technology |
| 7. | 2017/18 | Supervisor | Muhammad Ariff Bin Rizal | Spade Activity Prediction Algorithm for Diagnosis of Early Dementia Development |
| 8. | 2016/17 | Supervisor | Tan Kah Lok (A144020) |
Design and Implementation of Power Amplifier for 2.4GHz RF devices |
| 9. | 2015/16 | Supervisor | Siti Nur Mastura Binti Che Has (A140167) |
Design and implementation of a Variable Gain Amplifier (VGA) for 2.45 GHz Readerless RFID transponder. |
| 10. | 2015/16 | Supervisor | Mohd Raimi Bin Ruhaizad (A141207) |
A Time Seies-Based Sequence Prediction Algorithm to Predict Activities of Daily Living for Multi-People in Smart-Home |
| 11. | 2014/15 | Supervisor | Yeo Yong Jiet (A136389) |
A Location Based Sequence Prediction Algorithm to Predict Inhabitants Behavior in a Smart Home |
| 12. | 2013/14 | Supervisor | Chew Jia Xien (A133112) |
Design of an Active Inductor based CMOS Low Noise Amplifier for RF Receivers |
| 13. | 2013/14 | Supervisor | Yeoh Zijie (A133231) |
Design of a CMOS Transmit/Receive Switch for 2.4 GHz RF Applications |
| 14. | 2012/13 | Supervisor | Oh Soo Ling (A130249) |
Design of Ring-based Injection Locked Frequency Divider in 0.18µm CMOS for Active RFID Applications |
| 15. | 2012/13 | Supervisor | Muhammad Tazarudin Bin Mohd Taib (A129098) |
Design of a Band Pass Filter in 0.18µm CMOS for 2.45 GHz For Readerless RFID Transponder Front End |
| 16. | 2011/12 | Supervisor | Kang Cheng Wei (A122688) |
CMOS Charge Pump Circuit for RFID Tag EEPROM |
| 17. | 2010/11 | Supervisor | Phe Yeong Long (A116354) |
FPGA Realization of Fuzzy Based Image Enhancement |
| 18. | 2010/11 | Supervisor | Peh Kong Siang (A116789) |
FPGA Realization of Fuzzy Wavelet Based Texture Segmentation |
| 19. | 2009/10 | Supervisor | Norashikin Alias (A113776) |
IC Design and Layout of a 10-bit SAR Analog to Digital Converter |
Supervision of Dissertation for Bachelor of Engineering at International Islamic University Malaysia (IIUM):
| 1. | 2007/08 | Supervisor | Wan Nurkhaireen Mior Khairudin | FPGA Realization of Partial Encryption of Compressed Images |
| 2. | 2007/08 | Supervisor | Nursabrina Hazizan and Nurul Shakirah | Hardware Implementation of Logic-Based Model Checking Edge Detector |
| 3. | 2007/08 | Supervisor | Nurul Ain Bt Ahmad Shahuri and Siti Hajar Bt Basiran | FPGA Realization of Backpropagation for Stock Market Prediction |
Supervision of Dissertation for Bachelor of Engineering at at Multimedia University (MMU):
| 1. | 2005/06 | Supervisor | Poh Leong Meng | Hardware Implementation of Logic-Based Model Checking Edge Detector |
| 2. | 2005/06 | Supervisor | Yip Sook Chin | Hardware Implementation of DICOM Standard Lossless Compression of Medical Images |
| 3. | 2005/06 | Supervisor | Chia Kok Sun | FPGA Realization of Fuzzy Wavelet Based Texture Segmentation |
| 4. | 2005/06 | Supervisor | Koh Kim Ean | FPGA Implementation of Fuzzy Logic Based Image Enhancement and Smoothing Algorithm |
| 5. | 2004/05 | Supervisor | Muhammad Raisuddin Ahmed | ANN based Fetal QRS complex detection |
| 6. | 2004/05 | Supervisor | Chia Kenn Yong | FPGA Realization of Backpropagation for Stock Market Prediction |
| 7. | 2004/05 | Supervisor | Khandaker Asaduzzaman | FPGA Realization of RSA Encryption Engine |
| 8. | 2004/05 | Supervisor | Low Lay Chen | FPGA Realization of Fuzzy Wavelet Based Handwritten Character Recognition |
| 9. | 2003/04 | Supervisor | Chan Foong Tek | Hardware Realization of ECC (Elliptic Curve Cryptography) Encryption Engine |
| 10. | 2003/04 | Supervisor | Chee Shing Wei | Hardware Realization of triple DES (Data Encryption Standard) Encryption Engine |
| 11. | 2003/04 | Supervisor | Lim Choon Leng, Khor Cheng Aun |
VLSI implementation of ANN based QRS complex detection |
| 12. | 2002/03 | Supervisor | Tan Chin | FPGA Realization of Partial Matching Lossless Data Compression |
| 13. | 2002/03 | Supervisor | Tan Ai Leng | FPGA Realization of IRIS Recognition using Neural network |
| 14. | 2002/03 | Supervisor | Tho Kee Thai, Yeow Keng Hon |
FPGA Realization of Boolean Function Classification Schemes in Lossless Data Compression |
| 15. | 2002/03 | Supervisor | Tan Siew Li, Tan Huah Yuah |
FPGA Realization of Partial Encryption of Compressed Images |
| 16. | 2001/02 | Supervisor | Wendy Chia Chin Hui, Liana Jacinta |
FPGA Implementation of an Electric Train Controller |
| 17. | 2001/02 | Supervisor | Ooi Phaik Eo, Ng Joh |
Development of a Prototype Telemedicine Project |
| 18. | 2001/02 | Supervisor | Low Thiam Hen, Lim Sim Ee |
FPGA Implementation of a Fuzzy Controller |
| 19. | 2001/02 | Supervisor | Wong Sau Yee, James Wong Sing Toh |
Reliable QRS Complex Algorithm Development |
| 20. | 2001/02 | Supervisor | Thiruvarasu A/L Muthusamy | GUI Development of ECG Monitoring System |
| 21. | 2001/02 | Supervisor | Simon Lau Boung Yew, Chee Fong Kim |
FPGA Implementation of a QRS Complex Detector |
| 22. | 2001/02 | Supervisor | Chew En Geen, Ngu Ik Tse |
Pipelined Floating-Point ALU Design |
| 23. | 2001/02 | Supervisor | Winnie Teng Sung Shin, Ng See Leng |
FPGA Implementation of a RISC Processor |
| 24. | 2001/02 | Supervisor | Soh Lip Kai, Lim Chiew Luan |
VHDL Modelling of a Neural Network |
| 25. | 2001/02 | Supervisor | Jen Sen, Lim Ming Yi |
VLSI Chip Development of a MP3 Encoder/Decoder using VHDL |
| 26. | 2001/02 | Supervisor | Azadeen Bin Alaudeen, Florence Chong Chiao Mei |
VLSI Chip Development for the Digital Energy Meter |
| 27. | 2001/02 | Supervisor | Chong Min Jie | VLSI Design of FIR Filter |
| 28. | 2001/02 | Supervisor | Yeong Yeng Yee | VLSI Design of IIR Filter |
| 29. | 2001/02 | Supervisor | See Siew Kiong | VLSI Design of LZW Algorithm for Binary Data Compression |
| 30. | 2001/02 | Supervisor | Ooi Mann Yee | VLSI Design of Dynamic Random-Access Memory (DRAM) |
| 31. | 2001/02 | Supervisor | Chong Chee Hou | VLSI Design of Sequential Logic Circuit |
| 32. | 2001/02 | Supervisor | Suneeta Kaur | VLSI Design of Combinational Logic Circuit |
| 33. | 2001/02 | Supervisor | Sugeeta Bhanoo | VLSI Design of Arithmetic Logic Unit of Smart Card Architecture |
| 34. | 2001/02 | Supervisor | Lee Siew Fung | VLSI Design of Built-in-self-test for System on Chip (SOC) Design |
Faculty of Electronic Engineering & Technology
Universiti Malaysia Perlis (UniMAP)
Pauh Putra, 02600 Arau, Perlis
Malaysia
Phone: +60-133819838 / +880-1325681061
Email: mamun.reaz@gmail.com, mdmamun@unimap.edu.my
Mamun Bin Ibne Reaz 